Tata Electronics Semiconductor Fab

Tata Electronics (TEPL) | Fab

Published

October 12, 2026

TipWhy This Matters

India’s first commercial semiconductor fabrication plant. The most ambitious and complex project in the ISM portfolio.

What does this facility make?

Will fabricate silicon wafers at 28nm-55nm process nodes — the chips inside cars, IoT devices, industrial equipment, and telecom infrastructure. These are mature-node chips that India currently imports in massive quantities.

Why does it matter?

This is the project that will determine whether India can actually make chips, not just package them. A fab is orders of magnitude more complex than an assembly plant. Tata’s partnership with Taiwan’s PSMC brings process technology know-how, but building and operating a fab requires mastering thousands of manufacturing steps. If Dholera succeeds, it fundamentally changes India’s position in the global semiconductor supply chain.

Key Facts

Company Tata Electronics (TEPL)
Partners Powerchip Semiconductor Manufacturing Corp (PSMC), Taiwan, Kelington Group Berhad, Malaysia (fab infrastructure/process systems), FUJIFILM Corporation, Japan (semiconductor materials supply), Sumitomo Chemical Co., Ltd., Japan (semiconductor materials supply), Nexperia, Netherlands (MOSFET production partnership)
Type Fab
Capability 28nm-55nm Logic (50,000 Wafers/Month)
Status Under Construction
Investment ₹91,000 crore
Location Dholera, Gujarat
Category Commercial (ISM Approved)

Technical Complexity

2.9/5

Benchmarked against a 3nm fab (5/5).

Timeliness

Delay (TBD)

Original target: Dec 2026 (source)

Project Timeline

  • 29 Feb 2024 — Union Cabinet approves Tata-PSMC fab under the Modified Semiconductor Fab Scheme
  • 13 Mar 2024 — PM Modi lays foundation stone at Dholera Special Investment Region
  • 13 Mar 2024 — Construction begins — site preparation and civil works
  • 16 May 2026 — Tata Electronics and ASML sign MoU for lithography equipment supply, talent development, and supply chain collaboration for the Dholera fab
  • 17 Sep 2026 — Tata Electronics and FUJIFILM sign MoU; FUJIFILM to invest ~₹800 crore in a semiconductor-materials plant in Dholera SIR to supply high-purity chemicals (e.g. photoresists) for the fab, and to work with Indian chemical manufacturers to localise raw-material production
  • 17 Sep 2026 — Tata Electronics and Nexperia announce strategic partnership; Nexperia to lay groundwork for producing its MOSFET portfolio at Tata’s Dholera fab (front-end), alongside assembly/test of Nexperia discretes at Tata’s Jagiroad, Assam OSAT (back-end) — a framework for long-term cooperation, not a standalone Nexperia India facility or investment
  • 18 Sep 2026 — Tata Electronics and Kelington Group (Malaysia) sign MoU; Kelington to supply ultra-high-purity process piping and critical fab infrastructure/gas-delivery systems to accelerate the fab’s operational readiness
  • 18 Sep 2026 — Tata Electronics and Sumitomo Chemical sign MoU to explore supplying the Dholera fab with photoresists, functional chemicals, and high-purity chemicals (hydrogen peroxide, isopropyl alcohol, ammonia water, sulfuric acid), and to explore Sumitomo manufacturing semiconductor materials locally in India — no India facility or investment committed yet

OECD Taxonomy Classification

Classification using the OECD’s proposed semiconductor production taxonomy from Chips, Nodes and Wafers: A Taxonomy for Semiconductor Data Collection (OECD STI Policy Paper, August 2024, Figure 7, p. 27). The taxonomy organises front-end wafer fab data into three dimensions: plant information, capability, and capacity.

Dimension Field Value
Plant Information Location Dholera, Gujarat, India
Owner Tata Electronics Private Limited (India); technology partner: Powerchip Semiconductor Manufacturing Corp (PSMC), Taiwan
Status Under Construction
Start year 2026 (expected first wafers; construction began March 2024)
Business model Foundry
Capability Chip type Logic
Detailed chip type Info not available (foundry; depends on customer orders — likely MCU, microcontroller, power management, SoC)
Feature size 28nm – 55nm
Wafer size Info not available
Transistor type Planar MOSFET with High-K/Metal Gate (HKMG); 28nm is a pre-FinFET node
Process technologies DUV (Deep Ultraviolet) lithography; High-K dielectrics; Metal gate
Semiconductor material Silicon (Si)
Capacity Wafer starts per month ~50,000 wspm (target)
Cleanroom size Info not available

Supply Chain

Equipment, gas, and materials suppliers with their own tracked India facility feeding this project:

Sources


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